1. Field of the Invention
The present invention relates to a display panel and a method of fabricating a display panel, and more particularly, to a liquid crystal display panel and a method of fabricating a liquid crystal display panel.
2. Description of the Related Art
In general, a liquid crystal display device operates by controlling light transmittance through liquid crystals of a liquid crystal material layer using an applied electric field to orient the liquid crystals in order to display an image (i.e., a picture). Accordingly, the liquid crystal display includes a liquid crystal display panel having liquid crystal cells arranged in a matrix configuration, and a drive circuit to drive the liquid crystal display panel.
In addition, pixel and common electrodes are provided to supply the applied electric field to each of the liquid crystal cells. For example, the pixel electrodes are formed on a lower substrate of the liquid crystal cells, and the common electrode is formed across an entire surface of an upper substrate. Each pixel electrode is connected to a thin film transistor (TFT), which functions as a switching device, to drive the liquid crystal cell together with the common electrode according to data signals supplied through the TFT.
Since fabrication of the lower substrate requires a plurality of mask and semiconductor processes, production of the lower substrate becomes complicated and is considered a major factor in increases in fabrication costs of the liquid crystal display panel. Accordingly, fabrication processes have been developed to reduce the total number of mask processes required to produce the lower substrate. For example, one single mask process has been developed that includes several processing sequence steps, such as deposition, cleaning, photolithography, etching, exfoliation, and testing. Accordingly, a five-mask fabrication process sequence may be reduced to a four-mask fabrication process.
FIG. 1 is a plan view of a lower array substrate of a liquid crystal display according to the related art, and FIG. 2 is a cross sectional view along II–II′ of FIG. 1 according to the related art. In FIGS. 1 and 2, a lower substrate 1 of a liquid crystal display includes a TFT 30 located at each intersection part of data lines 4 and gate lines 2, and a pixel electrode 22 connected to a drain electrode 10 of the TFT 30. The TFT 30 includes a gate electrode 6 connected to the gate line 2, a source electrode 8 connected to the data line 4, and a drain electrode 10 connected to the pixel electrode 22 through a drain contact hole 20. The gate electrode 6 partially overlaps the data line 4, wherein an uppermost side of the overlapping area with the data line is formed to have an inclined surface. The drain electrode 10 has a neck part 10A where the drain electrode 10 overlaps the gate electrode 6, and a head part 10B where the drain electrode 10 overlaps the pixel electrode 22. The source electrode 8 projects from two areas of the data line 4 to face both sides of the neck part 10A of the drain electrode 10 with a C-shaped channel therebetween.
In addition, the TFT 30 includes semiconductor layers 14 and 16 that form a conductive channel between the source electrode 8 and the drain electrode 10 by application of a gate signal to the gate electrode 6. Accordingly, the TFT 30 selectively supplies a data signal from the data line 4 to the pixel electrode 22 in response to the gate signal received from the gate line 2.
The pixel electrode 22 is located at a cell area divided by the data line 4 and the gate line 2 and is formed of a transparent conductive material having a high light transmittance. The pixel electrode 22 is formed on a protective layer 18 provided on an entire surface of the lower substrate 1, and is electrically connected to the drain electrode 10 through a drain contact hole 20 formed in the protective layer 18. Accordingly, a potential difference is generated between the pixel electrode 22 and a common transparent electrode (not shown) formed in an upper substrate (not shown) by the data signal supplied through the TFT 30. The potential difference causes rotation of the liquid crystals located between the lower substrate 1 and the upper substrate (not shown) due to dielectric constant anisotropy of the liquid crystals. The rotating liquid crystals cause a light incident through the pixel electrode 22 from a light source to be transmitted toward an upper substrate.
FIGS. 3A to 3D are cross sectional views of a method of fabricating the lower array substrate of FIG. 2. In FIG. 3A, the gate electrode 6 and the gate line 2 are formed on the lower substrate 1 by depositing a gate metal layer, such as aluminum or an aluminum alloy, on the lower substrate 1 by a deposition method, such as sputtering. Then, the gate metal layer is patterned by photolithographic and etching processes using a first mask to form the gate electrode 6 and the gate line 2 on the lower substrate 1.
In FIG. 3B, a gate insulating film 12, an active layer 14, an ohmic contact layer 16, a data line (not shown), a source electrode 8, and a drain electrode 10 are formed on the lower substrate provided with the gate electrode 6 and the gate line 2. For example, the gate insulating film 12, first and second semiconductor layers, and a data metal layer are sequentially deposited on the lower substrate 1 using a deposition method, such as chemical vapor deposition or sputtering. The gate insulating film 12 is formed of an inorganic insulating material, such as silicon oxide SiOx or silicon nitride SiNx, a first semiconductor layer is formed of undoped amorphous silicon, a second semiconductor layer is formed of n-doped or p-doped amorphous silicon, and the data metal layer is formed of molybdenum Mo or an molybdenum alloy.
Then, a photo resist pattern is formed on the data metal layer using photolithographic processes using a second mask. For example, a halftone mask with a semi-transmitting part corresponding to a channel part of the TFT is used as the second mask. Accordingly, the photo resist pattern corresponding to the channel part is lower in height than the photo resist pattern corresponding to source and drain electrodes of the TFT. The data metal layer is patterned using a wet etching process using the photo resist pattern, whereby the data line 4, the source electrode 8, and the drain electrode 10 are formed.
Next, the first and second semiconductors are simultaneously patterned using a dry etching process using the photo resist pattern to form an active layer 14 and an ohmic contact layer 16. Then, a portion of the photo resist pattern corresponding to the channel part of the TFT is removed using an ashing process, and the data metal layer and the ohmic contact layer formed at the channel part are etched using the dry etching process using remaining portions of the photo resist pattern. Accordingly, the active layer 14 of the channel part is exposed, thereby separating the source electrode 8 from the drain electrode 10. Then, the remaining portions of the photo resist pattern are removed from the source electrode 8 and the drain electrode 10 using a stripping process.
In FIG. 3C, a protective film 18 having a drain contact hole 20 is formed on the gate insulating film 12 where the source electrode 8, the drain electrode 10, and the data line are formed. For example, an insulating material is deposited on the gate insulating film 12 provided with the source electrode 8, the drain electrode 10, and the data line, thereby forming the protective film 18. The protective film 18 is formed of an inorganic insulating material, such as silicon nitride SiNx and silicon oxide SiOx, or an organic insulating material, such as acrylic organic compound, benzocyclobutene BCB, and perfluorocyclobutane PFCB. Then, the protective film 18 is patterned using the photolithographic and etching processes using a third mask to form the drain contact hole 20. The drain contact hole 20 is formed to penetrate through the protective film 18 to expose the drain electrode 10.
In FIG. 3D, the pixel electrode 22 is formed on the protective film 18. For example, a transparent metal layer is formed on the lower substrate 1 by a deposition method, such as sputtering. The transparent metal layer is formed of indium-tin-oxide ITO, indium-zinc-oxide IZO, or indium-tin-zinc-oxide ITZO. Then, the transparent metal layer is patterned using the photolithographic and etching processes using a fourth mask to form the pixel electrode 22. The pixel electrode 22 is connected to the drain electrode 10 through the drain contact hole 20 in the protective film 18.
Accordingly, the data metal layer and the semiconductor layer are patterned using the same mask to form the active layer 14, the ohmic contact layer 16, the data line 4, the source electrode 8, and the drain electrode 10. In addition, the semiconductor layer is formed to be relatively wider than the data metal layer, wherein the active layer 14 located at a lower part of the data line 4 is formed to be wider than that of the data line 4, and the active layer 14 located at a lower part of the source electrode 8 and the drain electrode 10 is formed to be wider than these.
FIGS. 4A and 4B are cross sectional views along IV–IV′ of FIG. 1 according to the related art. In FIG. 4A, when the active layer 14 becomes conductive, a first capacitance Cdp2 is generated between the active layer 14 and the pixel electrode 22. In FIG. 4B, when the active layer 14 becomes non-conductive, a second capacitance Cdp1 is generated between the data line 4 and the pixel electrode 22. Accordingly, deterioration of picture quality occurs such that wave-shaped images are display on a display screen due to the difference between the first capacitance Cdp2 between the active layer 14 and the pixel electrode 22, which is generated by ON/OFF operation of a backlight device, and the second capacitance Cdp1 between the data line 4 and the pixel electrode 22.
FIG. 5 is a plan view of a lower array substrate of a liquid crystal display panel according to the related art, and FIG. 6 is a cross sectional view along IV–IV′ of FIG. 5 according to the related art. In FIGS. 5 and 6, a light-shielding pattern 24 of a liquid crystal display is formed of a gate metal layer formed on the substrate 1 to be relatively wider than an active layer 14 formed at a lower part of a data line 4. Accordingly, since the light shielding pattern 24 has a wider width than a width of the active layer 14, conductivity changes in the active layer 14 may be prevented due to the operation of the backlight. Furthermore, the capacitances C1 and C2 formed between the light-shielding pattern 24 and the pixel electrode 22 become equal, irrespective of the operational status of the backlight. Thus, deterioration of picture quality can be prevented.
However, charged voltage leakage in the pixel electrode when driving the liquid crystal display panel by a dot inversion system is problematic. For example, since first and second pixel electrodes 22′ and 22 are formed with the data line 4 therebetween, if a positive pixel voltage is charged in the first pixel electrode 22′ and a negative pixel voltage is charged in the second pixel electrode 22. The positive pixel voltage charged in the first pixel electrode 22′ through the light-shielding pattern, which forms the capacitances C1 and C2 with the first and second pixel electrodes 22′ and 22, respectively, leaks out to the second pixel electrode 22 through the first and second capacitances C1 and C2 and a resistance R of the light shielding pattern 24. Accordingly, the picture quality deteriorates.